Introductory TCAD Training
 

OVERVIEW

In this hands-on workshop, you will learn how to develop a test environment structure, which can implement any testcase with minimal modification. Within this environment structure, you will develop stimulus factories, check and coverage callbacks, message loggers, transactor managers, and data flow managers. Once the environment has been created, you will learn how to easily add extensions for more test cases.

After completing the course, you should have developed the skills to write a coverage-driven random stimulus based testbench that is robust, re-useable and easy to maintain.

OBJECTIVES

At the end of this workshop the student should be able to:

  • Run parameterized process and device simulations
  • Select proper models for the simulation of fabrication processes and electrical behavior of devices
  • Visualize simulated dopant profiles, structure boundaries and materials, I-V curves and internal structure characteristics such as carrier densities, current densities, electric fields and so on.
  • Successfully combine mask layouts and process flows to perform simulations of fabrication processes involving Si semiconductors
  • Properly mesh structures for adequate simulations
  • Perform AC analyses of RF parameters

AUDIENCE PROFILE

TCAD engineers, process integration engineers, and device engineers. This workshop is intended for engineers who have basic understanding of process and device simulation, but may never have used Synopsys TCAD tools. The class is also suited for engineers who have experience with TSuprem4/Medici but want to learn differences of these tools with the Sentaurus products.

PREREQUISITES

To benefit the most from the material presented in this course, you should have a good understanding of the physics involved in the fabrication process of microelectronic devices and/or microelectronic device physics.

COURSE SCHEDULE

Day 1 – Process simulation
  8:30 Registration open
  9:00 Start
Using Sentaurus Workbench to organize and run simulations
Basic Tecplot_SV usage
Preparing mesh for use with Sentaurus Process
Implantation
Diffusion and oxidation
Deposition, etch, epitaxy
17:00 Closing

Day 2 – Device simulation
  9:00 Start
Structure creation with Sentaurus Structure Editor
Meshing for device simulation
Input syntax for Sentaurus Device
Performing DC (Quasistationary),Transient, and AC Simulations
Choosing device simulation models
17:00 Closing

SYNOPSYS TOOLS USED

  • Sentaurus Workbench
  • Tecplot_SV
  • Sentaurus Structure Editor
  • Sentaurus Process
  • Mesh & Noffset
  • Sentaurus Device

COST
$1200 + VAT
Lunch is included.

TRAVEL INFORMATION
The training will take place at Synopsys office in Munich, which is in the eastern suburbs of the city. Directions and hotel information can be found here: http://admin.viewcentral.com/events/uploads/Synopsys/locations_germany.html

 

REGISTRATION
http://inter.viewcentral.com/reg/synopsys/europesearch